A) Field of the Invention
This invention relates to a zinc oxide based compound semiconductor device and more specifically relates to a zinc oxide based compound semiconductor light emitting device.
B) Description of the Related Art
Zinc Oxide (ZnO) is a direct band gap semiconductor with band gap energy of 3.37 eV at a room temperature and exciton binding energy of 60 meV which is relatively larger than other semiconductors. Moreover, it is characterized in that source material is cheap and harmless to a human body and environment, and so it is expected to realize an ecological light emitting device which is highly efficient and low power consuming.
A p-type layer and an n-type layer are necessary for a light emitting device such as a light emitting diode (LED), etc. A dopant for fabricating an n-type layer in a ZnO based compound semiconductor may be group III elements substituting Zn sites and group VII atoms substituted oxygen (O) sites, and especially a large number of n-type conductivity control have been reported by using group III elements such as gallium (Ga), aluminum (Al), Indium (In), etc.
For example, Japanese Patent No. 3040373 suggests a method for fabricating ZnO based transparent conductive films ZnO:Al, ZnO:Ga by doping the group III elements. 120th Division of Crystals Science and Technology, Japan Society of Applied Physics (2004), p. 27-34 reported that Ga concentration and carrier concentration in a single crystalline ZnO film could be sufficiently controlled in a range of 1017 to 1020 cm−3.
When fabricating a light emitting device such as an LED, etc., a device performance will be significantly lowered if dopants diffuse to non-desired layers. In case of a GaAs type semiconductor light emitting device, diffusion of p-type dopants to an active layer has been a problem, and so, for example, Japanese Laid-open Patent H09-260776 discloses a method for restraining the diffusion of p-type dopants by forming an n-type diffusion stopper layer between a p-type cladding layer and the active layer. Moreover, Japanese Laid-open Patent 2006-19695 discloses a method for restraining the diffusion of p-type dopants by forming a p-type layer consisting of at least two layers to which different dopants are doped. In case of the GaAs type semiconductor light emitting device, some methods for restraining the diffusion of p-type dopants are disclosed as in the above.
On the other hand, concerning to a ZnO based compound semiconductor, diffusion of dopants has been hardly reported, but the inventors of the present invention have found the diffusion of Ga as an n-type dopant in a semiconductor device as a problem to be solved.
FIG. 18 is a cross sectional view showing one example of a structure of a ZnO based LED device manufactured by a conventional method.
A normal LED has an n-type semiconductor layer, an active layer and a p-type semiconductor layer in a device, and Ga atoms are doped as dopants to the n-type semiconductor layer of the ZnO based LED.
The inventors of the present invention have actually manufactured the ZnO based LED device shown in FIG. 18 as a first comparative example by using the conventional manufacturing method.
First, on a cleansed n-type +c ZnO substrate 1 an undoped ZnO buffer layer 2 was formed. The buffer layer 2 was grown to have a thickness of 30 nm at 300 degrees Celsius. Next, annealing was performed to improve quality of the buffer layer 2. The annealing was performed at 900 degrees Celsius for 20 minutes.
After that, on a surface of the buffer layer 2, an n-type semiconductor layer 3 was formed at a growth temperature of 900 degrees Celsius. The n-type semiconductor layer 3 was Ga-doped Mg0.2Zn0.8O, and the concentration of Ga was about 2×1018 cm−3.
Thereafter, an undoped ZnO active layer 4 was formed on a surface of the n-type semiconductor layer 3 at a growth temperature of 900 degrees Celsius. On a surface of the active layer 4, a p-type semiconductor layer (N-doped Mg0.2Zn0.8O) 5 was formed at a growth temperature of 650 degrees Celsius.
Following the above described layer formation (film formation) processes, electrodes were formed. An n-type electrode (e.g., a lamination of a titan layer with a thickness of 2-10 nm and an aluminum layer with a thickness of 300-500 nm formed on the titan layer) 8 was formed on a surface of the substrate 1, a p-type transparent electrode (e.g., a lamination of a nickel layer which a thickness of 0.5-5 nm and a gold layer with a thickness of 1-20 nm formed on the nickel layer) 6 was formed on a surface of the p-type semiconductor layer, and a bonding-pad electrode (e.g., a lamination of a nickel layer with a thickness of 100 nm and a gold layer with a thickness of 1000 nm) 7 was formed on the p-type transparent electrode 6. A lithography technique using a resist film, etc. was used for forming the electrodes.
Finally an electrode alloying process was performed, for example, in oxidizing gas atmosphere at 300-800 degrees Celsius for about 30 seconds to 10 minutes. As described in the above, the ZnO based compound semiconductor light emitting device (ZnO based LED) was manufactured.
FIG. 19 is a graph showing depth profiles of N concentration and Ga concentration in the ZnO based LED manufactured by the conventional method as the LED shown in FIG. 18. This graph is based on a secondary ion-microprobe mass spectrometer (SIMS) measurement.
It is understood from the graph that the Ga atoms doped only to the n-type semiconductor layer 3 diffuse into the active layer 4 and a part of the p-type semiconductor layer 5. In that case, crystalline quality of the active layer 4 is lowered and defects functioning as nonradiative-recombination-centers are introduced and internal quantum efficiency is lowered. In the p-type layer 5, n-type carries are formed by the introduction of the defects by the decrease in crystalline quality and by the diffusion of the Ga atoms, and the formation of the n-type carries causes decrease in concentration of p-type carries and formation of n-type and gives bad effect on a manufacturing of a high power semiconductor light emitting device with high reliability. It can be considered that the diffusion of Ga atoms from the n-type layer progresses simultaneously with the growth of the active layer 4 and the p-type layer 5 while the substrate is kept at a high temperature.
FIG. 20 is a graph showing one example of current-voltage characteristics of the ZnO based LED whose SIMS measurement is shown in FIG. 19.
The graph shows current on a vertical axis and voltage on a horizontal axis. The unit of the vertical axis is 2 mA and the unit of the horizontal axis is 2V. In case of fabricating a p-n junction with ZnO based material, threshold voltage in the current-voltage characteristics should be about 3V; however, the ZnO based LED in FIG. 20 has the threshold voltage of about 1V. It shows that characteristic of the device is Schottky. This is because the device performance of the LED is significantly lowered by the diffusion of the Ga atoms as the dopants from the n-type semiconductor layer 3 to the p-type semiconductor layer 5. Therefore, no light emission can be observed from the ZnO based LED manufactured by the conventional method.
The diffusion of the Ga atoms can be restrained by keeping a substrate temperature (growth temperature) at least under 500 degrees Celsius when the active layer and the p-type semiconductor layer are formed on the n-type ZnO based semiconductor layer. However, if the growth temperature is too low, surfaces of the grown films will be very rough. In the MBE growth, if a distance which atoms (e.g., Zn or O) supplied to the surface of the substrate move on the surface of the substrate by migration at the time of the growth is not sufficient, a very rough three dimensionally grown film will be formed. The moving distance by the migration becomes short when the temperature is low and so the three-dimensionally grown film is formed.
Therefore, the substrate temperature (under about 500 degrees Celsius) wherein the Ga diffusion does not occur is too low and a three dimensionally grown film is formed. It is not preferable because the rough three-dimensionally grown film has dislocations and many spot defects and the dislocations and the defects lower the internal quantum efficiency and life time of the light emitting device.
For example, Japanese Laid-open Patent No. 2002-261321 discloses a light emitting device made of GaAs based compound semiconductor and having a lamination of an n-type cladding layer, an active layer and a p-type cladding layer, wherein a diffusion restraining layer mainly made of GaAs based compound semiconductor containing carbon atoms is formed between the p-type cladding layer and the active layer. The diffusion restraining layer restrains diffusion of Zn, Mg, Cd, BE, etc. used as dopants to the p-type cladding layer into the active layer.
Formation of such diffusion restraining layer or a diffusion barrier layer is effective to diffusion of atoms; however, high voltage is necessary to be applied to a light emitting device to desired electroluminescence intensity because those films are inserted as an additional layer which increases a thickness of the device.